UML State Machines vs. DFA

UML state machines are on a higher level of abstraction:

• hierarchical composition, parallelism
• guard conditions and effects along with trigger events (conditional branching, "scripting")
• can interact with its environment (by modifying variables, calling operations and/or dispatching events)

Note: The semantics is also quite different:

• if a given trigger event does not enable a transition at a particular state it is NOT an error, it is either ignored or deferred if defined as deferrable at a particular state