[NSWI004] Timer enabling

[Ondřej Hrubý]

On 07. 12. 19 19:46, Vojtech Horky wrote:
> I guess you have not available this in GitLab right? I see no such code in 
> your repository.

No, I didn't, sorry for that. I've pushed current version just now.

> For such remote (and off-line too) debugging to work, it is necessary to at 
> least send dump of registers (including CP0 ones), dump of TLB and at least
> a partial trace (last few instructions).

Next time, I will provide more details.

> No, it should not be necessary. But it is necessary to properly set status 
> register of newly created threads. Looking at notes to your solution, I see 
> that you have not set it. Perhaps that might be the culprit...
> 
> BTW, status register on boot is not in state that should be kept forever.
> For example, we clear the BEV bit quite soon but other bits are kept 
> unchanged...

Anyway, it works now, and yes, it was the Status reg. I used to initialize the
thread's Status register with actual value of Status register, as I considered
this the safest option.

After starting the experiments, I don't know why this didn't work as I just set
Status in kernel_main explicitly and then read its value on each of the thread's
stack (using cp0_read(REG_CP0_STATUS)), so it should work...

Finally, two things have helped:

• Setting the initial value of Status reg to value 0x8001 (IE=1, TIMER_MASK=1,
ERL=0) for each thread explicitly. I don't know why.

• Writing the value of Compare register in timer interrupt handler clears the
interrupt. Otherwise, the interrupt is triggered again and again, hijacking all
of the CPU time.

> Hope this helps,

Yes, very much. Thank you for your suggestions!

- OH